A Survey of Non-conventional Techniques for Low-voltage Low-power Analog Circuit Design

Designing integrated circuits able to work under low-voltage (LV) low-power (LP) condition is currently undergoing a very considerable boom. Reducing voltage supply and power consumption of integrated circuits is crucial factor since in general it ensures the device reliability, prevents overheating of the circuits and in particular prolongs the operation period for battery powered devices. Recently, non-conventional techniques i.e. bulk-driven (BD), floating-gate (FG) and quasi-floating-gate (QFG) techniques have been proposed as powerful ways to reduce the design complexity and push the voltage supply towards threshold voltage of the MOS transistors (MOST). Therefore, this paper presents the operation principle, the advantages and disadvantages of each of these techniques, enabling circuit designers to choose the proper design technique based on application requirements. As an example of application three operational transconductance amplifiers (OTA) base on these non-conventional techniques are presented, the voltage supply is only ±0.4 V and the power consumption is 23.5 µW. PSpice simulation results using the 0.18 µm CMOS technology from TSMC are included to verify the design functionality and correspondence with theory

Full-wave recifier based on differential difference current conveyor for LV LP application

In this paper, two full-wave voltage mode and current mode precision rectifiers based on bulk-driven quasi floating-gate (BD-QFG) differential difference current conveyor (DDCC) are presented. The rectifiers are capable to operate under ultra-low voltage (LV) of ±0.3 V and consume extremely low power (LP) in micro range. Moreover, these rectifiers enjoy circuit simplicity, whereas the voltage mode rectifier designed using only two BD-QFG DDCCs, and the current mode rectifier is constructed from only one BD-QFG DDCC and one SOD523 diode from NXP Semiconductor. Thus their circuits are suitable for IC fabrication. Both rectifiers yield better performance in view of the minimum number of devices, reduced power consumption and acceptable operation frequency. The performance of these rectifiers is investigated through PSPICE simulation program using 0.18 μm CMOS technology from TSMC